Saturday, February 25, 2012

My first Microprocessor design


Specifications

1.  RAM:                                    32*8 bits of RAM
2.  Data Bus:                               8 bit
3.  User Visible registers:             A, B, C, D
4. Control and status registers:     MAR, MBR, IR, PC, TEMP
5. ALU:                                      8 bit, performs Addition, complementing and logical NAND operation
6. Flag:                                       Zero, carry

The block diagram of the microprocessor is shown below:
The microprocessor is based on RISC approach. Hence it supports minimum number of instructions.

Instruction set
Instruction is 8 bit. The first 3 bits denote the type of instruction. The last 2 bits give the register address.
The instruction set is as follows
1. SFA memory:  Store from register A to given memory address
2. STA memory: Store to register A from given memory address
3. JMP memory:  Performs unconditional jump to the given memory address
4. ADD A, R:        Performs addition between the given register and register A and stores in register A
5. CMP:                                Complements the contents of register A
6. NAND A, R:    Performs logical NAND between register A and given register contents
7. MVI A, Data:  performs immediate addressing
8. MOV A, R:      Moves the data from register A to given register

The instruction decoder and the timing generator is shown below:
The combinational logic used to generate the required signal for the different latches present in the registers, ALU was drawn based on the micro-instruction analysis. Which I’ll add shortly.

The combinational logic thus designed is as shown below:



 This is just a simple design of a microprocessor. I'm trying to understand the more complex microprocessors present in today's market. And hope fully will design an efficient design someday!  


Sunday, February 5, 2012

VHDL


 Introduction:

VHDL stands for VHSIC (Very High Speed Integrated Circuit) Hardware Description Language. U.S. Department of Defense developed VHDL in 70’s and 80’s with ADA as its root. IEEE adopted VHDL as a standard in 1987. VHDL is now used to describe most of the digital systems. We can design hardware in a VHDL IDE, for FPGA implementation, to produce the RTL schematic of the desired circuit. Then the generated schematic can be verified using simulation software which shows the waveforms of inputs and outputs of the circuit after generating the appropriate test-bench. To generate an appropriate test-bench for a particular circuit or VHDL code, the inputs have to be defined correctly. When the VHDL model is written in FPGA, the model is transformed to actual hardwired components rather than just a programming language loaded to a processor. Hence rather than program being executed, we run the model in hardwired form.

FPGA design and programming

To define the behavior of the FPGA, we write a hardware description language (HDL) or make a schematic design. The HDL form is more suited to work with large structures because it's possible to just specify them numerically rather than having to draw every piece by hand. However, schematic entry can allow for easier visualization of a design.
Then, using an electronic design automation tool, a technology-mapped netlist is generated. The netlist can then be fitted to the actual FPGA architecture using a process called place-and-route, usually performed by the FPGA Company’s proprietary place-and-route software. The user will validate the map, place and route results via timing analysissimulation, and other verification methodologies. Once the design and validation process is complete, the binary file generated is used to (re)configure the FPGA. This file is transferred to the FPGA/CPLD via a serial interface (JTAG) or to an external memory device like an EEPROM.
Advantages of VHDL:
1.  It allows us to model the behavior of the required system and simulate it before synthesis tools   translates the design into real hardware (gates and wires).
2.  VHDL unlike most of the programming language allows us to write concurrent statements. These concurrent statements are executed in parallel. This increases the processing speed.
3. VHDL project is multipurpose. Being created once, a calculation block can be used in many other projects. However, many formational and functional block parameters can be tuned (capacity parameters, memory size, element base, block composition and interconnection structure).
4. VHDL project is portable. Being created for one element base, a computing device project can be ported on another element base, for example VLSI with various technologies.

VHDL Constructs

Entity:  An entity is the most basic building block in a design. The uppermost level of the design is the top-level entity. If the design is hierarchical, then the top-level description will have lower-level descriptions contained in it. These lower-level descriptions will be lower-level entities contained in the top-level entity description.
 Architecture:  All entities that can be simulated have an architecture description. The architecture describes the behavior of the entity. A single entity can have multiple architectures.
 Configuration:  A configuration statement is used to bind a component instance to an entity-architecture pair.
Package: A package is a collection of commonly used data types and subprograms used in a design.
Driver: This is a source on a signal. If a signal is driven by two sources, then when both sources are active, the signal will have two drivers.
Bus:  The term “bus” usually brings to mind a group of signals or a particular method of communication used in the design of hardware.
Attribute: An attribute is data that are attached to VHDL objects or predefined data about VHDL objects.
Generic: A generic is VHDL’s term for a parameter that passes information to an entity. For instance, if an entity is a gate level model with a rise and a fall delay, values for the rise and fall delays could be passed into the entity with generics.
Process: A process is the basic unit of execution in VHDL. All operations that are performed in a simulation of a VHDL description are broken into single or multiple processes.




VHDL code Structure:


VHDL code structure consists of library declarations, entity and architecture defining the behavior of the entity.
Library:  It is the collection of commonly used codes. Placing the codes inside the library allows us to frequently use them anywhere possible. The code is usually written in the form of FUNTIONS, POCEDURES, COMPONENTS, CONSTANTs or TYPES which are placed inside a PACKAGE. Library is declared using the following statement.
LIBRARY library_name;
USE library_name.package_name.package_parts;

Entity: Entity is the list of all the input output port and its specifications. It consists of the following format:

Architecture: It is a description of the behavior of the entity. Its syntax is as follows:

Saturday, January 7, 2012

The miracle of FFT


I’ve always admired discrete signals. Without them I’d not be able to write this blog and make you able to read it. But with discrete signals comes the need for a method of efficient signal processing. And that is where FFT has helped a lot. Fast Fourier transform is a method of calculating the DFT of a given signal. But the catch is that it reduces the computational step to that extent where our digital processors can easily compute.  FFT has many variations such as FFT by decimation in time, FFT by decimation in frequency etc. I’ll briefly talk about the FFT using decimation in frequency, how it works and how it helps in computation.
We know that for a discrete signal x(n) the DFT is given as,
Now in order to understand FFT we analyze the property of WN. We can easily to arrive to following results:
WNN=1
WNN/2=-1 and WNN+K= WNKNow let N be the total number of discrete data sequence and N=2L where L is an integer. Now since N is even we’ll have N/2 also even. Then we can write,

Splitting X(k) into even and odd samples we’ve

Now the beauty of the above equations is that DFT of signal with 8 samples can be calculated using 4 DFTs as shown below in the picture.
And again 2 DFT can be calculated as shown below.

Now the 8-point DFT can be computed with the following butterfly diagram.

From all these what is interesting is that for normal 8-point DFT we would require N2 complex multiplication and N(N-1) complex addition. Whereas using FFT we only require (N/2)log2N complex multiplication and Nlog2N complex addition. This is way less! Due to this FFT can be employed in Digital processors to calculate and manipulate the discrete data. I’ll talk more on this later. Ciao!

Friday, January 6, 2012

My understanding of Maxwell's Equations

Every Professor i asked, they said i should have basic understanding of the Maxwell's equation to be able to understand the propagation of waves. So I went out searching the meaning of the well known Maxwell's equation. Sure it is easy to just write the mathematical interpretation but this time i really wanted to know their physical implication as well. 
So what are Maxwell's equations, to answer this we have to be able to know certain laws. Not in any order, the first is Ampere's law. Basically what i understood is that current carrying conductor will have magnetic field around it. for a simple conductor carrying current, the direction of the magnetic field is obtained by right hand grip with thumb pointing in the direction of the current. Now conversely if we integrate the Magnetic field around the close loop we get Current.
\oint_{\partial S} \mathbf{H} \cdot \mathrm{d}\mathbf{l} = I_{f,S} + \frac {\partial \Phi_S(\mathbf D)}{\partial t}
now the second term out here we can see was added by Maxwell. This term accounts the effect of time changing displacement current. 
The second law is Faraday's. Which was little easy to understand. We know that electric potential between two point is the amount of work done in moving a unit positive charge from one point to the other against the electric field. Now If we try to find the work done in moving a charge in a loop then the total work will be zero since we end up getting at the very spot we started from. So line integral of electric field around a close loop will be equal to zero. But this is the case only for time invariant field. For time variant magnetic fields the line integral of electric field will yield the EMF. And if we take the curl of  the electric field, which is basically the measure of varying electric field, gives us rate of change of magnetic flux with time. 
\oint_{\partial S} \mathbf{E} \cdot \mathrm{d}\mathbf{l}  = - \frac {\partial \Phi_S{(\mathbf B)}}{\partial t}
the third is Gauss law. Now if D is electric flux density then it's surface integral will give us the charge enclosed itself.
 \iint_{\partial V}\!\!\!\!\!\!\!\!\!\!\!\!\!\!\!\!\!\!\!\;\;\;\subset\!\supset \mathbf D\;\cdot\mathrm{d}\mathbf A = Q_{f}(V)
And the fourth law is of Gauss too but for magnetic fields. Since magnetic field always follow a close loop. and there hasn't been any discovery of magnetic mono-pole the interpretation of this equation was self evident.
\iint_{\partial V}\!\!\!\!\!\!\!\!\!\!\!\!\!\!\!\!\!\!\!\;\;\;\subset\!\supset \mathbf B\;\cdot\mathrm{d}\mathbf A = 0

So far i've gained little idea about the equations and am still striving to have a deeper understanding regarding the implications. The equations written above are in integral form. The differential form of the Maxwell equations were yet simpler to analyze apart from few, by few i meant all four of them.
The differential form of ampere was that curl of magnetic field gave current density and time-changing displacement current. I've been trying to imagine this in my mind for a long time. Curl has always daunted me in calculations, not mathematically but rather with it's physical interpretation.  What I've been able to analyze so far is that, when we analyze the time variant magnetic field, it will produce the curl in the perpendicular direction of it's flow. And this curl will be J, current density as curling magnetic field always indicate presence of current. 
Differential form of Faraday's law states that curl of electric field will yield time-changing magnetic flux density. this one is still in the process of being imagined. As changing electric field will certainly produce changing current and changing current will always have changing magnetic field around it.
Gauss law for electric field in differential form was easy to analyze as divergence of electric flux density, which is the measure of outflow-inflow, gives charge density.
And the differential form of Gauss law for magnetic fields states that divergence of magnetic flux density is equal to zero as magnetic field through a closed surface will always have equal inflow and outflow.
\nabla \cdot \mathbf{D} = \rho_f
\nabla \cdot \mathbf{B} = 0
\nabla \times \mathbf{E} = -\frac{\partial \mathbf{B}} {\partial t}
\nabla \times \mathbf{H} = \mathbf{J}_f + \frac{\partial \mathbf{D}} {\partial t}
So these are the Maxwell equations. I still have a lot of way to go before fulling understanding them. Never stop learning!